Comparator Based Crystal Oscillator

Although a simple crystal oscillator may be built from one comparator of an LT1720/LT1721, this will suffer from a number of inherent shortcomings and design problems. Although the LT1720/LT1721 will give the correct logic output when one input is outside the common mode range, additional delays may occur when it is so operated, opening the possibility of spurious operating modes. Therefore, the DC bias voltages at the inputs have to be set near the center of the LT1720/LT1721’s common mode range and a resistor is required to attenuate the feedback to the non-inverting input. Unfortunately, although the output duty cycle for this circuit is roughly 50%, it is affected by resistor tolerances and, to a lesser extent, by comparator offsets and timings.

 

If a 50% duty cycle is required, the circuit shown here creates a pair of complementary outputs with a forced 50% duty cycle. Crystals are narrow-band elements, so the feedback to the non-inverting input is a filtered analogue version of the square-wave output. The crystal’s path provides resonant positive feedback and stable oscillation occurs. Changing the non-inverting reference level can vary the duty cycle. The 2k-680Ω resistor pair sets a bias point at the comparator + (Comparator IC1a) and – (Comparator IC1b) input. At the complementary input of each comparator, the 2k-1.8k-0.1µF path sets up an appropriate DC average level based on the output.

 

IC1b creates a complementary output to IC1a by comparing the same two nodes with the opposite input. IC2 compares band-limited versions of the outputs and biases IC1a’s negative input. IC1a’s only degree of freedom to respond is variation of pulse width; hence the outputs are forced to 50% duty cycle. The circuit operates from 2.7V to 6V. When ‘scoping the oscillator output signal, a slight dependence on comparator loading, will be noted, so equal and resistive loading should be used in critical applications. The circuit works well because of the two matched delays and rail-to-rail outputs of the LT1720.

 

 

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Very Low Power 32kHz Oscillator

The 32-kHz low-power clock oscillator offers numerous advantages over conventional oscillator circuits based on a CMOS inverter. Such inverter circuits present problems, for example, supply currents fluctuate widely over a 3V to 6V supply range, while current consumption below 250 µA is difficult to attain. Also, operation can be unreliable with wide variations in the supply voltage and the inverter’s input characteristics are subject to wide tolerances and differences among manufacturers. The circuit shown here solves the above problems. Drawing just 13 µA from a 3V supply, it consists of a one-transistor amplifier/oscillator (T1) and a low-power comparator/reference device (IC1).

Circuit diagram:

Very Low Power 32kHz Oscillator Circuit Diagram

The base of T1 is biased at 1.25 V using R5/R4 and the reference in IC1. T1 may be any small-signal transistor with a decent beta of 100 or so at 5 µA (defined here by R3, fixing the collector voltage at about 1 V below Vcc). The amplifier’s nominal gain is approximately 2 V/V. The quartz crystal combined with load capacitors C1 and C3 forms a feedback path around T1, whose 180 degrees of phase shift causes the oscillation. The bias voltage of 1.25 V for the comparator inside the MAX931 is defined by the reference via R2. The comparator’s input swing is thus accurately centred around the reference voltage.

Operating at 3 V and 32 kHz, IC1 draws just 7 µA. The comparator output can source and sink 40 mA and 5 mA respectively, which is ample for most low-power loads. However, the moderate rise/fall times of 500 ns and 100 ns respectively can cause standard, high-speed CMOS logic to draw higher than usual switching currents. The optional 74HC14 Schmitt trigger shown at the circuit output can handle the comparator’s rise/fall times with only a small penalty in supply current.

Author: http://www.ecircuitslab.com/2011/06/very-low-power-32khz-oscillator.html