Showing posts with label on. Show all posts
Showing posts with label on. Show all posts

Friday, February 7, 2014

Alternating ON OFF Control

Use this circuit instead of a standard on-off switch. Switching is very gentle. Connect unused input pins
to an appropriate logic level. Unused output pins *MUST* be left open!. First push switches ON,
another push switches OFF. You can use 1/4 watt resistors if they are metal-film type. Any proper
substitute will work for Q1, including the european TUNs. For C2, if you find the relay acts not fast
enough, leave it out or change to a ceramic cap between 10 and 100nF.

Parts List
All resistors are 1/2 Watt and 5% tolerance.
R1 = 10K
R2 = 100K
R3 = 10K
C1 = 0.1µF, Ceramic
C2 = 1µF/16V, Electrolytic
D1= 1N4001
Q1 = 2N4401 (ECG123AP, NTE123AP, etc.)
IC1 = 4069, CMOS, Hex Inverter (14069), or equivalent
S1 = Momentary on-switch

Copyright © Tony van Roon
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Friday, January 24, 2014

Digital Clock Based on Sam Gordon Theory

The circuit was designed to implement the concept of Sam Gordon in making a digital clock with visible components from the viewer of the clock.

  • Sam Clock – a digital clock equipment that is fully parametric or constantly varying with its parameters of function and construction, which has been operational for many years without problems on a 24 hour basis.
  • 74HC – a quad 2-input NAND gate with standard output capability, and is high speed Si-gate CMOS device that is pin compatible with low power Schottky TTL and specified in compliance with JEDEC standard no. 7A.
  • 74LS – a monolithic decade and binary counter that contains four master-slave flip flops and additional gating to provide a divide-by-two counter and a 3-stage binary counter with typical power dissipation of 45 mW and count frequency of 42 MHz.
  • 4060 – a 14-bit ripple counter with internal oscillator that has glitches which may occur in any logic gate systems connected to its outputs due to the slight delay before the later counter outputs respond to a clock pulse.
  • LM317 – an adjustable 3-terminal positive voltage regulator capable of supplying in excess of 1.5A over an output voltage range of 1.2V to 37V and requires only two external resistors to set the output voltage due to its internal current limiting, thermal shutdown and safe area compensation, making it essentially blow-out proof.
  • 4017 – a decade counter where the count advances as the clock input becomes high that may be combined with diodes for some functions such as flash sequences.
The main clock circuit consists of TTL and several CMOS represented by IC9 to IC13. The component combination drives the common cathode LED display while common anode can be driven when CMOS 4511 is replaced with 74LS47. Changing from common cathode to common anode would require the change of connection in DIS1 up to DIS5 display. A 1 Hz pulse frequency that comes from SL10 is divided in sequence by IC2 and IC4 within the region of the gates to make sure the indication of time in the format of Hours, Minutes, and Seconds. The tens of Hours are driven by Q1 with only the LED B and C of DIS6 display to indicate 1 to 12 for Hours indication. A small heatsink may be used to suppress the increase in temperature of Q1.

Digital Clock Based on Sam Gordon Theory

The supplied voltage of the circuit is shared into two lines where the 5 VA supplied with voltage in case of breakdown in network voltage, supplies all the ICs except the IC9 to IC13 which is being supplied by 5 VB. A battery is alternatively used in the case of interruption of circuit voltage. The second figure shows the indication of the display as it is driven by IC9 to IC13 where CMOS 4511 is used. The diodes DIS1 to DIS5 are conducting as common cathode while DIS6 will always be common anode. The use of 74LS47 will cause the DIS1 to DIS5 to conduct at common anode with their pins 1 and 6 going to the line of 5 VB with R39 and R40 to 0 V line. The dot in DIS3 and DIS5 is turned ON by these resistors to produce a division of LED displays.

There are two ways, found in the initial startup of operation, by which the 1 Hz pulse can be produced which constitute to the basis of time for the clock. The two methods consist of using a crystal oscillator with high oscillation frequency and the division of this frequency to create 1 Hz in the end. This would ensure a very précised and stable operation in producing the pulses. The crystal oscillator in figure 3 produces the 1 MHz frequency that is divided in stages from the IC15 up to IC17.

The gates A and B of IC18 and IC19 are not initially included in the operation unless the switches S1 or S2 are pressed to modify the time. Pressing the Super Fast (S1), would release a frequency pulse of 10 KHz while pressing Fast (S2) would release a pulse frequency of 100 Hz, to show indication to the display concerning the modification of time in a short interval. The figure 3 circuit is being supplied by 5 VA where the operation of oscillator is ensured, even in the event of voltage interruption, which would trigger the use of the battery.

Figure 4 also introduced the usage of crystal oscillator to produce 1 Hz in the output of SL19. This frequency is made possible by successive division 3.2768 MHz frequency coming from the oscillator, in the start of the operation. The presence of variable capacitor C3 is for altering the oscillator in order to test the frequency pulse at 204800 Hz. The indication of display is regulated by the switches S1 (fast) and S2 (super fast) for having a frequency of 10 Hz and 100 Hz respectively. The adjustment of time will be in a short interval, since the indication of display runs very fast. The use of mechanic switches is preferred due to simplicity. The circuit is similarly powered as in figure 3.

The fifth figure shows the power supply as it provides the necessary voltage for the operation of the circuit, together with the charging mechanism for the battery and the transfer in battery during voltage interruptions. The output from this supply circuit is regulated by the trimmer TR1 to produce 5 V at P1 to enable the functionality of the circuit. The next trimmer TR2 regulates IC25 as it gives 6.9 V at P2, which charges the lead acid battery which is rated 6V per 1 Ah, connected to SL17. During voltage interruption, the relay RL1 is triggered where its contacts connect the 5 VA line to the 6 V battery via the D5 and D6while 5 VB is connected to 0 V where the display stops.

Digital Clock Based on Sam Gordon Theory

The duration by which the contacts transfer from one state to the other is determined by C17. The IC24 and IC25 should be placed in a heatsink and be regulated with TR1 and TR2 without being connected to the supply circuit except during the use of batteries.The concept of the circuit is also embraced in other digital clocks. And because they are small inexpensive devices with LED displays, they are typically found in automobile clocks, desk clocks, microwave ovens, industrial clocks, computers, interval timers, radios, and televisions.
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Friday, December 27, 2013

Process formation of RGB signal on TV

Basically the UOC is equipped with RGB or YUV input from external, so it is possible to use the DVD input. Selection of these inputs can be done internally within the IC.  But in the G7 and G7A chassis input YUV signal is not used, so in the ground.




RGB signal processing flow is described according to the image below :

iagram of the formation RGB signal
Diagram of the formation RGB signal


1. Signal Yint, uint, and Vint is derived from a series of color decoder and Y / C switch is fed into a series of YUV selector 1.

2. From YUV selector, sub-carrier signal color (U and V) is inserted into the chain matrix. In this matrix series component sub-carrier signal BY of the color (U signal) and BY component of sub-carrier signal color (V signal) in separate. Here the color difference signal in the form of the color sub carrier. GY signal generated by a combination of color difference signals RY and BY.

3. From YUV selector, luminan signal is passed to a series of black stretch. The working principle is to sharpen the series of black stretch black levels. Gray color in a certain percentage in drag to a black color so the color is sharper.

4. Three color difference signals (RY), (BY) (GY) and luminan signal (Y) are mixed and processed in RGB adder circuit to produce three primary colors red, green and blue (RGB).

5. RGBOSD formed in the UOC IC is used to display the OSD text. The selection and arrangement RGBOSD kontrast between RGB and composite signals is done by way of a switch by the internal microprocessor.

6. Three output video signal (RGB signal) is assumed as the current that flows to the CRT cathode. Drive level coming into the cathode tube is always diadjust by CCC loop (Continues Cathode Calibration) and feedback currents in pass to Black Current Input pin 50.

7. CCC loop works as a stabilizer against the black level and drive the cathode in a loop (continuous) to the RGB signal in order to obtain the proper offset and gain.

CCC Loop Application
CCC Loop Application


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Unique amplifier circuit schmeatic based on IC TDA7255

This circuit equipped with 2 switches that are useful for loudness and filtering, on SW1 as the loudness , SW2 as a filter. It also equipped with direct  adjust of sound on Potentiometer 10k , but only useful as a master volume.
Minimum Voltage  : 8 volts
Maximum Voltage : 18 volts
Maximum Power   : 2 X 13 Watt stereo
Impedance Power  : 4 Ohms
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